564 lines
10 KiB
C
564 lines
10 KiB
C
/* Massimo:
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* This is a slightly modified version of the linux kernel file
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* /<source-dir>/include/asm-powerpc/atomic.h
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*
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*/
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#ifndef FF_ASM_POWERPC_ATOMIC_H
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#define FF_ASM_POWERPC_ATOMIC_H
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/* some defines taken from: */
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/* stringify.h */
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#define __stringify_1(x) #x
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#define __stringify(x) __stringify_1(x)
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/* asm-compat.h */
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#define __stringify_in_c(...) #__VA_ARGS__
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#define stringify_in_c(...) __stringify_in_c(__VA_ARGS__) " "
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#define PPC405_ERR77(ra,rb) stringify_in_c(dcbt ra, rb;)
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#define PPC405_ERR77_SYNC stringify_in_c(sync;)
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/* synch.h */
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#ifdef __powerpc64__
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#define __SUBARCH_HAS_LWSYNC
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#endif
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#ifdef __SUBARCH_HAS_LWSYNC
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# define LWSYNC lwsync
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#else
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# define LWSYNC sync
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#endif
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#define ISYNC_ON_SMP "\n\tisync\n"
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#define LWSYNC_ON_SMP __stringify(LWSYNC) "\n"
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/*
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* PowerPC atomic operations
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*/
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typedef struct { unsigned int counter; } atomic_t;
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#define ATOMIC_INIT(i) { (i) }
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static __inline__ int atomic_read(const atomic_t *v)
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{
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int t;
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__asm__ __volatile__("lwz%U1%X1 %0,%1" : "=r"(t) : "m"(v->counter));
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return t;
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}
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static __inline__ void atomic_set(atomic_t *v, int i)
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{
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__asm__ __volatile__("stw%U0%X0 %1,%0" : "=m"(v->counter) : "r"(i));
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}
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static __inline__ void atomic_add(int a, atomic_t *v)
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{
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int t;
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__asm__ __volatile__(
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"1: lwarx %0,0,%3 \n\
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add %0,%2,%0\n"
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PPC405_ERR77(0,%3)
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" stwcx. %0,0,%3 \n\
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bne- 1b"
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: "=&r" (t), "+m" (v->counter)
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: "r" (a), "r" (&v->counter)
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: "cc");
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}
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static __inline__ int atomic_add_return(int a, atomic_t *v)
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{
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int t;
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__asm__ __volatile__(
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LWSYNC_ON_SMP
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"1: lwarx %0,0,%2 \n\
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add %0,%1,%0\n"
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PPC405_ERR77(0,%2)
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" stwcx. %0,0,%2 \n\
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bne- 1b"
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ISYNC_ON_SMP
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: "=&r" (t)
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: "r" (a), "r" (&v->counter)
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: "cc", "memory");
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return t;
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}
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#define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0)
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static __inline__ void atomic_sub(int a, atomic_t *v)
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{
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int t;
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__asm__ __volatile__(
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"1: lwarx %0,0,%3 \n\
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subf %0,%2,%0\n"
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PPC405_ERR77(0,%3)
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" stwcx. %0,0,%3 \n\
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bne- 1b"
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: "=&r" (t), "+m" (v->counter)
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: "r" (a), "r" (&v->counter)
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: "cc");
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}
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static __inline__ int atomic_sub_return(int a, atomic_t *v)
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{
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int t;
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__asm__ __volatile__(
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LWSYNC_ON_SMP
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"1: lwarx %0,0,%2 \n\
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subf %0,%1,%0\n"
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PPC405_ERR77(0,%2)
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" stwcx. %0,0,%2 \n\
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bne- 1b"
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ISYNC_ON_SMP
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: "=&r" (t)
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: "r" (a), "r" (&v->counter)
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: "cc", "memory");
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return t;
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}
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static __inline__ void atomic_inc(atomic_t *v)
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{
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int t;
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__asm__ __volatile__(
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"1: lwarx %0,0,%2 \n\
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addic %0,%0,1\n"
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PPC405_ERR77(0,%2)
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" stwcx. %0,0,%2 \n\
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bne- 1b"
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: "=&r" (t), "+m" (v->counter)
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: "r" (&v->counter)
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: "cc");
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}
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static __inline__ int atomic_inc_return(atomic_t *v)
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{
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int t;
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__asm__ __volatile__(
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LWSYNC_ON_SMP
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"\n\
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1: lwarx %0,0,%2\n\
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addic %0,%0,1\n\
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stwcx. %0,0,%2\n\
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bne- 1b"
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ISYNC_ON_SMP
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: "=&r" (t), "=m" (v->counter)
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: "r" (v), "m" (v->counter)
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: "cc");
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/*
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__asm__ __volatile__(
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LWSYNC_ON_SMP
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"1: lwarx %0,0,%1 \n\
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addic %0,%0,1\n"
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PPC405_ERR77(0,%1)
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" stwcx. %0,0,%1 \n\
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bne- 1b"
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ISYNC_ON_SMP
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: "=&r" (t)
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: "r" (&v->counter)
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: "cc", "memory");
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*/
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return t;
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}
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/*
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* atomic_inc_and_test - increment and test
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* @v: pointer of type atomic_t
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*
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* Atomically increments @v by 1
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* and returns true if the result is zero, or false for all
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* other cases.
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*/
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#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0)
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static __inline__ void atomic_dec(atomic_t *v)
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{
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int t;
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__asm__ __volatile__(
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"1: lwarx %0,0,%2 \n\
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addic %0,%0,-1\n"
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PPC405_ERR77(0,%2)\
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" stwcx. %0,0,%2\n\
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bne- 1b"
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: "=&r" (t), "+m" (v->counter)
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: "r" (&v->counter)
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: "cc");
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}
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static __inline__ int atomic_dec_return(atomic_t *v)
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{
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int t;
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__asm__ __volatile__(
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LWSYNC_ON_SMP
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"1: lwarx %0,0,%1 \n\
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addic %0,%0,-1\n"
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PPC405_ERR77(0,%1)
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" stwcx. %0,0,%1\n\
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bne- 1b"
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ISYNC_ON_SMP
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: "=&r" (t)
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: "r" (&v->counter)
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: "cc", "memory");
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return t;
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}
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/**
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* atomic_add_unless - add unless the number is a given value
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* @v: pointer of type atomic_t
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* @a: the amount to add to v...
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* @u: ...unless v is equal to u.
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*
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* Atomically adds @a to @v, so long as it was not @u.
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* Returns non-zero if @v was not @u, and zero otherwise.
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*/
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static __inline__ int atomic_add_unless(atomic_t *v, int a, int u)
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{
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int t;
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__asm__ __volatile__ (
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LWSYNC_ON_SMP
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"1: lwarx %0,0,%1 \n\
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cmpw 0,%0,%3 \n\
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beq- 2f \n\
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add %0,%2,%0 \n"
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PPC405_ERR77(0,%2)
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" stwcx. %0,0,%1 \n\
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bne- 1b \n"
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ISYNC_ON_SMP
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" subf %0,%2,%0 \n\
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2:"
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: "=&r" (t)
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: "r" (&v->counter), "r" (a), "r" (u)
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: "cc", "memory");
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return t != u;
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}
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#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
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#define atomic_sub_and_test(a, v) (atomic_sub_return((a), (v)) == 0)
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#define atomic_dec_and_test(v) (atomic_dec_return((v)) == 0)
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/*
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* Atomically test *v and decrement if it is greater than 0.
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* The function returns the old value of *v minus 1, even if
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* the atomic variable, v, was not decremented.
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*/
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static __inline__ int atomic_dec_if_positive(atomic_t *v)
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{
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int t;
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__asm__ __volatile__(
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LWSYNC_ON_SMP
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"1: lwarx %0,0,%1 \n\
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cmpwi %0,1\n\
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addi %0,%0,-1\n\
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blt- 2f\n"
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PPC405_ERR77(0,%1)
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" stwcx. %0,0,%1\n\
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bne- 1b"
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ISYNC_ON_SMP
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"\n\
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2:" : "=&b" (t)
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: "r" (&v->counter)
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: "cc", "memory");
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return t;
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}
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static __inline__ unsigned long
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__cmpxchg_u32(volatile unsigned int *p, unsigned long old, unsigned long _new)
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{
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unsigned int prev;
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__asm__ __volatile__ (
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LWSYNC_ON_SMP
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"1: lwarx %0,0,%2 # __cmpxchg_u32\n\
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cmpw 0,%0,%3\n\
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bne- 2f\n"
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PPC405_ERR77(0,%2)
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" stwcx. %4,0,%2\n\
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bne- 1b"
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ISYNC_ON_SMP
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"\n\
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2:"
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: "=&r" (prev), "+m" (*p)
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: "r" (p), "r" (old), "r" (_new)
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: "cc", "memory");
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return prev;
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}
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#define atomic_cmpxchg(v, o, n) (__cmpxchg_u32(&((v)->counter), (o), (n)))
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#define atomic_xchg(v, n) (xchg(&((v)->counter), n))
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#define smp_mb__before_atomic_dec() smp_mb()
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#define smp_mb__after_atomic_dec() smp_mb()
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#define smp_mb__before_atomic_inc() smp_mb()
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#define smp_mb__after_atomic_inc() smp_mb()
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#ifdef __powerpc64__
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typedef struct { unsigned long counter; } atomic64_t;
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#define ATOMIC64_INIT(i) { (i) }
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static __inline__ long atomic64_read(const atomic64_t *v)
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{
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long t;
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__asm__ __volatile__("ld%U1%X1 %0,%1" : "=r"(t) : "m"(v->counter));
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return t;
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}
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static __inline__ void atomic64_set(atomic64_t *v, long i)
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{
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__asm__ __volatile__("std%U0%X0 %1,%0" : "=m"(v->counter) : "r"(i));
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}
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static __inline__ void atomic64_add(long a, atomic64_t *v)
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{
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long t;
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__asm__ __volatile__(
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"1: ldarx %0,0,%3 \n\
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add %0,%2,%0\n\
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stdcx. %0,0,%3 \n\
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bne- 1b"
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: "=&r" (t), "+m" (v->counter)
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: "r" (a), "r" (&v->counter)
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: "cc");
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}
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static __inline__ long atomic64_add_return(long a, atomic64_t *v)
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{
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long t;
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__asm__ __volatile__(
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LWSYNC_ON_SMP
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"1: ldarx %0,0,%2 \n\
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add %0,%1,%0\n\
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stdcx. %0,0,%2 \n\
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bne- 1b"
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ISYNC_ON_SMP
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: "=&r" (t)
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: "r" (a), "r" (&v->counter)
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: "cc", "memory");
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return t;
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}
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#define atomic64_add_negative(a, v) (atomic64_add_return((a), (v)) < 0)
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static __inline__ void atomic64_sub(long a, atomic64_t *v)
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{
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long t;
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__asm__ __volatile__(
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"1: ldarx %0,0,%3 \n\
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subf %0,%2,%0\n\
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stdcx. %0,0,%3 \n\
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bne- 1b"
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: "=&r" (t), "+m" (v->counter)
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: "r" (a), "r" (&v->counter)
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: "cc");
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}
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static __inline__ long atomic64_sub_return(long a, atomic64_t *v)
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{
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long t;
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__asm__ __volatile__(
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LWSYNC_ON_SMP
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"1: ldarx %0,0,%2 \n\
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subf %0,%1,%0\n\
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stdcx. %0,0,%2 \n\
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bne- 1b"
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ISYNC_ON_SMP
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: "=&r" (t)
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: "r" (a), "r" (&v->counter)
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: "cc", "memory");
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return t;
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}
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static __inline__ void atomic64_inc(atomic64_t *v)
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{
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long t;
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__asm__ __volatile__(
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"1: ldarx %0,0,%2 \n\
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addic %0,%0,1\n\
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stdcx. %0,0,%2 \n\
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bne- 1b"
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: "=&r" (t), "+m" (v->counter)
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: "r" (&v->counter)
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: "cc");
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}
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static __inline__ long atomic64_inc_return(atomic64_t *v)
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{
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long t;
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__asm__ __volatile__(
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LWSYNC_ON_SMP
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"1: ldarx %0,0,%1 \n\
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addic %0,%0,1\n\
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stdcx. %0,0,%1 \n\
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bne- 1b"
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ISYNC_ON_SMP
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: "=&r" (t)
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: "r" (&v->counter)
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: "cc", "memory");
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return t;
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}
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/*
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* atomic64_inc_and_test - increment and test
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* @v: pointer of type atomic64_t
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*
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* Atomically increments @v by 1
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* and returns true if the result is zero, or false for all
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* other cases.
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*/
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#define atomic64_inc_and_test(v) (atomic64_inc_return(v) == 0)
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static __inline__ void atomic64_dec(atomic64_t *v)
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{
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long t;
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__asm__ __volatile__(
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"1: ldarx %0,0,%2 \n\
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addic %0,%0,-1\n\
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stdcx. %0,0,%2\n\
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bne- 1b"
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: "=&r" (t), "+m" (v->counter)
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: "r" (&v->counter)
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: "cc");
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}
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static __inline__ long atomic64_dec_return(atomic64_t *v)
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{
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long t;
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__asm__ __volatile__(
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LWSYNC_ON_SMP
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"1: ldarx %0,0,%1 \n\
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addic %0,%0,-1\n\
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stdcx. %0,0,%1\n\
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bne- 1b"
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ISYNC_ON_SMP
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: "=&r" (t)
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: "r" (&v->counter)
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: "cc", "memory");
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return t;
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}
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#define atomic64_sub_and_test(a, v) (atomic64_sub_return((a), (v)) == 0)
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#define atomic64_dec_and_test(v) (atomic64_dec_return((v)) == 0)
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/*
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* Atomically test *v and decrement if it is greater than 0.
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* The function returns the old value of *v minus 1.
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*/
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static __inline__ long atomic64_dec_if_positive(atomic64_t *v)
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{
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long t;
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__asm__ __volatile__(
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LWSYNC_ON_SMP
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"1: ldarx %0,0,%1 \n\
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addic. %0,%0,-1\n\
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blt- 2f\n\
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stdcx. %0,0,%1\n\
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bne- 1b"
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ISYNC_ON_SMP
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"\n\
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2:" : "=&r" (t)
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: "r" (&v->counter)
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: "cc", "memory");
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return t;
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}
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/**
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* atomic64_add_unless - add unless the number is a given value
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* @v: pointer of type atomic64_t
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* @a: the amount to add to v...
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* @u: ...unless v is equal to u.
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*
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* Atomically adds @a to @v, so long as it was not @u.
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* Returns non-zero if @v was not @u, and zero otherwise.
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*/
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static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u)
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{
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long t;
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__asm__ __volatile__ (
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LWSYNC_ON_SMP
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"1: ldarx %0,0,%1 \n\
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cmpd 0,%0,%3 \n\
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beq- 2f \n\
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add %0,%2,%0 \n"
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" stdcx. %0,0,%1 \n\
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bne- 1b \n"
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ISYNC_ON_SMP
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" subf %0,%2,%0 \n\
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2:"
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: "=&r" (t)
|
|
: "r" (&v->counter), "r" (a), "r" (u)
|
|
: "cc", "memory");
|
|
|
|
return t != u;
|
|
}
|
|
|
|
#define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0)
|
|
|
|
|
|
static __inline__ unsigned long
|
|
__cmpxchg_u64(volatile unsigned long *p, unsigned long old, unsigned long _new)
|
|
{
|
|
unsigned long prev;
|
|
|
|
__asm__ __volatile__ (
|
|
LWSYNC_ON_SMP
|
|
"1: ldarx %0,0,%2 # __cmpxchg_u64\n\
|
|
cmpd 0,%0,%3\n\
|
|
bne- 2f\n\
|
|
stdcx. %4,0,%2\n\
|
|
bne- 1b"
|
|
ISYNC_ON_SMP
|
|
"\n\
|
|
2:"
|
|
: "=&r" (prev), "+m" (*p)
|
|
: "r" (p), "r" (old), "r" (_new)
|
|
: "cc", "memory");
|
|
|
|
return prev;
|
|
}
|
|
|
|
#define atomic64_cmpxchg(v, o, n) (__cmpxchg_u64(&((v)->counter), (o), (n)))
|
|
#define atomic64_xchg(v, n) (xchg(&((v)->counter), n))
|
|
|
|
#endif /* __powerpc64__ */
|
|
|
|
|
|
#endif /* FF_ASM_POWERPC_ATOMIC_H */
|