250 lines
6.6 KiB
C
250 lines
6.6 KiB
C
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/*
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* The following has been taken from Cilk (version 5.4.6) file cilk-sysdep.h.
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* The Cilk Project web site is http://supertech.csail.mit.edu/cilk/
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*
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*/
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/*
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* Copyright (c) 2000 Massachusetts Institute of Technology
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* Copyright (c) 2000 Matteo Frigo
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*
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* This library is free software; you can redistribute it and/or modify it
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* under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation; either version 2.1 of the License, or (at
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* your option) any later version.
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*
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* This library is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307,
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* USA.
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*
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*/
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/* Don't just include config.h, since that is not installed. */
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/* Instead, we must actually #define the useful things here. */
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/* #include "../config.h" */
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/* Compiler-specific dependencies here, followed by the runtime system dependencies.
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* The compiler-specific dependencies were originally written by Eitan Ben Amos.
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* Modified by Bradley.
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*/
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#ifndef FF_SPIN_SYSDEP_H
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#define FF_SPIN_SYSDEP_H
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#if defined(__APPLE__)
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#include <AvailabilityMacros.h>
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#endif
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/***********************************************************\
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* Various types of memory barriers and atomic operations
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\***********************************************************/
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/* RISCV
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Marco Aldinucci
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10/04/2022 02:08
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RISC-V-Linux/linux/arch/riscv/include/asm/barrier.h
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*/
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#if defined(__riscv)
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#pragma message "RISCV detected - experimental"
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#define nop() __asm__ __volatile__ ("nop")
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#define RISCV_FENCE(p, s) \
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__asm__ __volatile__ ("fence " #p "," #s : : : "memory")
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/* These barriers need to enforce ordering on both devices or memory. */
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#define mb() RISCV_FENCE(iorw,iorw)
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#define rmb() RISCV_FENCE(ir,ir)
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#define wmb() RISCV_FENCE(ow,ow)
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/* These barriers do not need to enforce ordering on devices, just memory. */
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#define __smp_mb() RISCV_FENCE(rw,rw)
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#define __smp_rmb() RISCV_FENCE(r,r)
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#define __smp_wmb() RISCV_FENCE(w,w)
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#define WMB() __smp_wmb()
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#define PAUSE()
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#endif
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/*------------------------
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POWERPC
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------------------------*/
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#if defined(__powerpc__) || defined(__ppc__)
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/* This version contributed by Matteo Frigo Wed Jul 13 2005. He wrote:
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* lwsync is faster than eieio and has the desired store-barrier
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* behavior. The isync in the lock is necessary because the processor is
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* allowed to speculate on loads following the branch, which makes the
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* program without isync incorrect (in theory at least---I have never
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* observed such a speculation).
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*/
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#define WMB() __asm__ __volatile__ ("lwsync" : : : "memory")
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#define PAUSE()
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/* atomic swap operation */
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static __inline__ int xchg(volatile int *ptr, int x)
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{
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int result;
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__asm__ __volatile__ (
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"0: lwarx %0,0,%1\n stwcx. %2,0,%1\n bne- 0b\n isync\n" :
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"=&r"(result) :
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"r"(ptr), "r"(x) :
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"cr0");
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return result;
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}
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#endif
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/*------------------------
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IA64
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------------------------*/
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#ifdef __ia64__
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#define WMB() __asm__ __volatile__ ("mf" : : : "memory")
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#define PAUSE()
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/* atomic swap operation */
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static inline int xchg(volatile int *ptr, int x)
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{
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int result;
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__asm__ __volatile ("xchg4 %0=%1,%2" : "=r" (result)
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: "m" (*(int *) ptr), "r" (x) : "memory");
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return result;
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}
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#endif
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/*------------------------
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I386
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------------------------*/
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#ifdef __i386__
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#define WMB() __asm__ __volatile__ ("": : :"memory")
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#define PAUSE() __asm__ __volatile__ ("rep; nop" : : : "memory")
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/* atomic swap operation
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Note: no "lock" prefix even on SMP: xchg always implies lock anyway
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*/
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static inline int xchg(volatile int *ptr, int x)
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{
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__asm__("xchgl %0,%1" :"=r" (x) :"m" (*(ptr)), "0" (x) :"memory");
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return x;
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}
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#endif /* __i386__ */
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/*------------------------
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ARM (Mauro Mulatero)
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------------------------*/
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#if defined(__arm__) || defined(__aarch64__)
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#define isb() __asm__ __volatile__ ("isb" : : : "memory")
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#define dsb() __asm__ __volatile__ ("dsb" : : : "memory")
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#define dmb() __asm__ __volatile__ ("dmb" : : : "memory")
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#define smp_mb() dmb()
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#define smp_rmb() dmb()
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#define smp_wmb() dmb()
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#define WMB() __asm__ __volatile__ ("dmb st": : : "memory")
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#define PAUSE()
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#define xchg(ptr,x) \
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((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
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static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size)
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{
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unsigned long ret;
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// MA: updated 12/08/22 unsigned int ==> unsignet long
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unsigned long tmp;
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smp_mb();
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// MA: updated 12/08/22 teq %1, #0 ==> teq %w1, #0
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switch (size) {
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case 1:
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asm volatile("@ __xchg1\n"
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"1: ldrexb %0, [%3]\n"
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" strexb %1, %2, [%3]\n"
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" teq %w1, #0\n"
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" bne 1b"
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: "=&r" (ret), "=&r" (tmp)
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: "r" (x), "r" (ptr)
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: "memory", "cc");
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break;
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case 4:
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asm volatile("@ __xchg4\n"
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"1: ldrex %0, [%3]\n"
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" strex %1, %2, [%3]\n"
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" teq %1, #0\n"
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" bne 1b"
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: "=&r" (ret), "=&r" (tmp)
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: "r" (x), "r" (ptr)
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: "memory", "cc");
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break;
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default:
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break;
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}
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smp_mb();
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return ret;
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}
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#endif /* __arm__ */
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/*------------------------
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amd_64
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------------------------*/
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#ifdef __x86_64
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#define WMB() __asm__ __volatile__ ("": : :"memory")
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#define PAUSE() __asm__ __volatile__ ("rep; nop" : : : "memory")
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/* atomic swap operation */
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static inline int xchg(volatile int *ptr, int x)
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{
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__asm__("xchgl %0,%1" :"=r" (x) :"m" (*(ptr)), "0" (x) :"memory");
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return x;
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}
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#endif /* __x86_64 */
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/*------------------------
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(Marco Aldinucci)
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------------------------*/
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static inline void *getAlignedMemory(size_t align, size_t size) {
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void *ptr;
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#if (defined(_WIN32)) // || defined(__INTEL_COMPILER)) && defined(_WIN32)
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if (posix_memalign(&ptr,align,size)!=0) // defined in platform.h
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return NULL;
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// Fallback solution in case of strange segfaults on memory allocator
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//ptr = ::malloc(size);
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#else // linux or MacOS >= 10.6
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if (posix_memalign(&ptr,align,size)!=0)
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return NULL;
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#endif
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/* ptr = (void *)memalign(align, size);
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if (p == NULL) return NULL;
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*/
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return ptr;
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}
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static inline void freeAlignedMemory(void* ptr) {
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#if defined(_WIN32)
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if (ptr) posix_memalign_free(ptr); // defined in platform.h
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// Fallback solution in case of strange segfaults
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//::free(ptr);
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#else
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if (ptr) ::free(ptr);
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#endif
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}
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#endif /* FF_SPIN_SYSDEP_H */
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