129 lines
3.8 KiB
C
129 lines
3.8 KiB
C
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/* Mauro Mulatero:
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* This is a slightly modified version of the linux kernel file
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* /<source-dir>/include/asm-arm/atomic.h
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*
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*/
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#ifndef FF_ASM_ARM_ATOMIC_H
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#define FF_ASM_ARM_ATOMIC_H
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typedef struct { volatile int counter; } atomic_t;
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#define ATOMIC_INIT(i) { (i) }
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#define atomic_read(v) ((v)->counter)
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/*
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* ARMv6 UP and SMP safe atomic ops. We use load exclusive and
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* store exclusive to ensure that these are atomic. We may loop
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* to ensure that the update happens. Writing to 'v->counter'
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* without using the following operations WILL break the atomic
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* nature of these ops.
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*/
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static inline void atomic_set(atomic_t *v, int i)
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{
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unsigned long tmp;
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__asm__ __volatile__("@ atomic_set\n"
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"1: ldrex %0, [%1]\n" // load ex: tmp <- v->counter
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" strex %0, %2, [%1]\n" // store ex: tmp(status), i -> v->counter ; tmp=0 se tutto ok
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" teq %0, #0\n" // controlla se tmp contiene 0 e loop se !=
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" bne 1b"
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: "=&r" (tmp) // output: %0
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: "r" (&v->counter), "r" (i) // input: %1, %2
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: "cc", "memory");
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}
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static inline int atomic_add_return(int i, atomic_t *v)
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{
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unsigned long tmp;
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int result;
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__asm__ __volatile__("@ atomic_add_return\n"
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"1: ldrex %0, [%2]\n" // load ex: result <- v->counter
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" add %0, %0, %3\n" // result = result + i
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" strex %1, %0, [%2]\n" // store ex: tmp(status), result -> v->counter ; tmp=0 se tutto ok
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" teq %1, #0\n" // controlla se tmp contiene 0 e loop se !=
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" bne 1b"
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: "=&r" (result), "=&r" (tmp) // output: %0, %1
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: "r" (&v->counter), "Ir" (i) // input: %2, %3
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: "cc", "memory");
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return result;
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}
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static inline int atomic_sub_return(int i, atomic_t *v)
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{
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unsigned long tmp;
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int result;
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__asm__ __volatile__("@ atomic_sub_return\n"
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"1: ldrex %0, [%2]\n"
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" sub %0, %0, %3\n"
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" strex %1, %0, [%2]\n"
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" teq %1, #0\n"
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" bne 1b"
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: "=&r" (result), "=&r" (tmp)
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: "r" (&v->counter), "Ir" (i)
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: "cc", "memory");
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return result;
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}
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/*****
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oldval = ptr->counter;
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if(oldval == old)
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ptr->counter = New;
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****/
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static inline int atomic_cmpxchg(atomic_t *ptr, int old, int New)
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{
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unsigned long oldval, res;
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do {
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__asm__ __volatile__("@ atomic_cmpxchg\n"
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"ldrex %1, [%2]\n"
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"mov %0, #0\n"
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"teq %1, %3\n"
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"strexeq %0, %4, [%2]\n"
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: "=&r" (res), "=&r" (oldval)
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: "r" (&ptr->counter), "Ir" (old), "r" (New)
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: "cc", "memory");
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} while (res);
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return oldval;
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}
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#define atomic_xchg(v, New) (xchg(&((v)->counter), New))
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static inline int atomic_add_unless(atomic_t *v, int a, int u)
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{
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int c, old;
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c = atomic_read(v);
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while (c != u && (old = atomic_cmpxchg((v), c, c + a)) != c)
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c = old;
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return c != u;
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}
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#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
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#define atomic_add(i, v) (void) atomic_add_return(i, v)
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#define atomic_inc(v) (void) atomic_add_return(1, v)
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#define atomic_sub(i, v) (void) atomic_sub_return(i, v)
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#define atomic_dec(v) (void) atomic_sub_return(1, v)
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#define atomic_inc_and_test(v) (atomic_add_return(1, v) == 0)
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#define atomic_dec_and_test(v) (atomic_sub_return(1, v) == 0)
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#define atomic_inc_return(v) (atomic_add_return(1, v))
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#define atomic_dec_return(v) (atomic_sub_return(1, v))
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#define atomic_sub_and_test(i, v) (atomic_sub_return(i, v) == 0)
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#define atomic_add_negative(i,v) (atomic_add_return(i, v) < 0)
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/* Atomic operations are already serializing on ARM */
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#define smp_mb__before_atomic_dec() barrier()
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#define smp_mb__after_atomic_dec() barrier()
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#define smp_mb__before_atomic_inc() barrier()
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#define smp_mb__after_atomic_inc() barrier()
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#endif /* FF_ASM_ARM_ATOMIC_H */
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